The invention relates generally to a connecting arrangement and more specifically to such a connecting arrangement that comprises a number of transistors that can be activated and deactivated by a control signal connected to the control terminals of the transistors to form, by means of the control signal, a circuit between two conductors with resistive properties and values.
More specifically, this circuit presents a resistance value that corresponds to the value of the control signal, such as a voltage value, by which a set resistance value can be changed in dependence on a selected other voltage value with an increasing resistance value corresponding to an increasing voltage value.
When the expression "resistive properties" is used in the following description and claims it will be understood that this expression refers to not only purely resistive properties but also substantially resistive properties. It will further be understood that when the expression "transistor" is used it refers, not only to a single transistor, but also to one or several transistors connected in parallel or series, or any other configuration of transistors, which present functions and/or properties that are similar to a single transistor.
The present invention is, more specifically, meant to be used as a terminating impedance with resistive properties belonging to a signal receiving circuit, adapted to receive voltage pulses that appear on one or two conductors intended to transfer signals. The bit-rate of the voltage pulses can exceed 150 megabits per second (150 Mb/s).
It is previously known, and it is within the characteristics of transistors manufactured with CMOS technology, such as NMOS transistors, that the drain-source section of these transistors presents resistive properties, or substantially resistive properties, within an initial voltage range of the drain-source voltage (V.sub.DS) for various values of the gate-source voltage (V.sub.GS), and it is thereby known to usc this property in various circuit connections.
It is thus previously known to use one or several transistors to form a circuit connected between two conductors and presenting resistive properties and values, where the current resistance value depends on the selected voltage value of a control signal connectable to the gate terminal(s) of the transistor(s).
It is further known that signal receiving circuits are equipped with matching impedances, with resistive properties, to adapt the signalling across the signalling conductors, wherein the resistance value of the matching impedance is adjustable to present a momentary resistance value that corresponds to the momentary impedance conditions of the signal transmission. It is previously known, through U.S. Pat. No. 5,194,765, to control the matching impedance of a transmitter digitally, with a control circuit intended for this purpose. A paper by Knight et al., "A Self-Terminating Low-Voltage-Swing CMOS Output Driver" IEEE Journal of Solid State Circuits, vol. 23, pp. 457-464 (Apr. 1988) describes a CMOS circuit intended to generate a digital signal at an output terminal that has a specific and controlled output impedance. The circuit arrangements described here are thus digitized and transmitter related.
In view of the known prior art, as described above, there is a need for a circuit equipped with a signal receiver that can be regulated by an analog control voltage, where the resistive properties of the circuit can be varied within certain limits by connecting one or several analog control signals to one or several control terminals of one or several transistors. Each and every one of these control signals should be connected to the gate terminals of a group of transistors where the drain terminals and source terminals of the transistors are connected to two receiver-related signalling conductors. At the same time, the control signal, in the form of a control voltage, is selected so that the operating point of a transistor will be within, or at least close to, the region where the transistor presents resistive properties. A first control connection, intended for a first control signal, should coact with a first group of transistors, and a second control connection, intended for a second control signal, should coact with a second group of transistors, and so on, in order to provide various combinations that will enlarge the available region of resistive values. The number of transistors within a first group should be selected to be different from the number of transistors within a second group in order to further enlarge the available region of resistive values.
There is further a need for a connecting arrangement presenting resistive properties of the above-described kind as receiver-related terminating resistances, within a system intended to transfer information-carrying signals with digital voltage pulses and high frequency and with the selected transistors preferably NMOS transistors.
There is a need to realize the advantages obtained with a connecting arrangement of the above-described kind, when the circuit, connected between the two conductors, is intended to serve as a terminating impedance with substantially resistive properties either connected between the signalling conductors and a reference potential (VT) or between the conductors.
There is, besides this, a need to realize the advantages obtained by using a gate matrix and a macro circuit along the edges of the gate matrix from a base-bar of the gate matrix to the terminating circuit.
There is further a need to realize the advantages obtained by letting the second of the two conductors be a conductor that presents a voltage reference, such as a conductor connected to ground potential.
There is also a need to form, from a base-bar, with a thereto applied metal layer, a circuit that is connectable as a rcceiver-related terminating impedance, with resistive properties, within a signal receiving unit, that can be used in "single-ended" signalling and form active parallel terminating impedances within a signal receiving unit adapted to "differential" signalling. A control signal, or control signals, should be controlled through specific connecting means. The connecting means should be controlled to generate a digital signal for set resistance values and/or an analog signal to select any resistance value within the available resistance range. The connecting means should be a number of analog transmission gates, each and every one controllable into an active or inactive state. The analog transmission gates should be activated or deactivated by means of a signal inverting circuit.
An analog transmission gate should be coordinated to a control connection of a group of transistors, such as NMOS transistors. A control voltage, passing through respective analog transmission gates, should be given digitized voltage values or analog voltage values. Certain group-related transistors, such as NMOS transistors, should be selected for digitized voltage values, and certain other group-related transistors should be selected for analog voltage values in order to create selected impedance or resistance values. A control connection should be given a voltage value corresponding to a selected terminating reference and regulated by a specifically constructed regulating circuit. The selected transistors, and/or transistor connections, should present a large region with resistive properties and thereby a large regulating area. The voltage between the drain and source terminals should be selected up to, or somewhat below, 1.5 V. A connection of various selected resistance values, with resistance variations weighted in a unanimous way according to a digital series, should be performed by means of a connection of one or several selected groups of transistors. An analog control voltage should be selected in order to control continuously the resistance variations to a selected value.